An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors

Johannes Hofmann, Georg Hager, Gerhard Wellein, Dietmar Fey. An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors. In Julian M. Kunkel, Rio Yokota, Pavan Balaji, David E. Keyes, editors, High Performance Computing - 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings. Volume 10266 of Lecture Notes in Computer Science, pages 294-314, Springer, 2017. [doi]

@inproceedings{HofmannHWF17,
  title = {An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors},
  author = {Johannes Hofmann and Georg Hager and Gerhard Wellein and Dietmar Fey},
  year = {2017},
  doi = {10.1007/978-3-319-58667-0_16},
  url = {https://doi.org/10.1007/978-3-319-58667-0_16},
  researchr = {https://researchr.org/publication/HofmannHWF17},
  cites = {0},
  citedby = {0},
  pages = {294-314},
  booktitle = {High Performance Computing - 32nd International Conference, ISC High Performance 2017, Frankfurt, Germany, June 18-22, 2017, Proceedings},
  editor = {Julian M. Kunkel and Rio Yokota and Pavan Balaji and David E. Keyes},
  volume = {10266},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-319-58667-0},
}