A Power-Performance Scalable FPGA Using Configurable Voltage Domains and Design Mapping Tool

Frank Honoré. A Power-Performance Scalable FPGA Using Configurable Voltage Domains and Design Mapping Tool. In Tero Rissa, Steven J. E. Wilton, Philip Heng Wai Leong, editors, Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005. pages 709-710, IEEE, 2005.

@inproceedings{Honore05,
  title = {A Power-Performance Scalable FPGA Using Configurable Voltage Domains and Design Mapping Tool},
  author = {Frank Honoré},
  year = {2005},
  tags = {design},
  researchr = {https://researchr.org/publication/Honore05},
  cites = {0},
  citedby = {0},
  pages = {709-710},
  booktitle = {Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, August 24-26, 2005},
  editor = {Tero Rissa and Steven J. E. Wilton and Philip Heng Wai Leong},
  publisher = {IEEE},
  isbn = {0-7803-9362-7},
}