Guanrong Hou, Behzad Razavi. A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance. In 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021. pages 1-2, IEEE, 2021. [doi]
@inproceedings{HouR21,
title = {A 56-Gb/s 8-mW PAM4 CDR/DMUX with High Jitter Tolerance},
author = {Guanrong Hou and Behzad Razavi},
year = {2021},
doi = {10.23919/VLSICircuits52068.2021.9492414},
url = {https://doi.org/10.23919/VLSICircuits52068.2021.9492414},
researchr = {https://researchr.org/publication/HouR21},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021},
publisher = {IEEE},
isbn = {978-4-86348-780-2},
}