New hardware-efficient algorithm and architecture for the computation of 2-D DCT on a linear systolic array

Shen-Fu Hsiao, Wei-Ren Shiue. New hardware-efficient algorithm and architecture for the computation of 2-D DCT on a linear systolic array. In Proceedings of the 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '99, Phoenix, Arizona, USA, March 15-19, 1999. pages 3517-3520, IEEE Computer Society, 1999. [doi]

@inproceedings{HsiaoS99a,
  title = {New hardware-efficient algorithm and architecture for the computation of 2-D DCT on a linear systolic array},
  author = {Shen-Fu Hsiao and Wei-Ren Shiue},
  year = {1999},
  doi = {10.1109/ICASSP.1999.757601},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICASSP.1999.757601},
  researchr = {https://researchr.org/publication/HsiaoS99a},
  cites = {0},
  citedby = {0},
  pages = {3517-3520},
  booktitle = {Proceedings of the 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '99, Phoenix, Arizona, USA, March 15-19, 1999},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-5041-3},
}