Design space exploration with a cycle-accurate systemC/TLM DRAM controller model

Ting-Shuo Hsu, Chao-Chieh Wu, Che-Wei Hsu, Chih-Tsun Huang, Jing-Jia Liou, Yao-Hua Chen, Juin-Ming Lu. Design space exploration with a cycle-accurate systemC/TLM DRAM controller model. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{HsuWHHLCL17,
  title = {Design space exploration with a cycle-accurate systemC/TLM DRAM controller model},
  author = {Ting-Shuo Hsu and Chao-Chieh Wu and Che-Wei Hsu and Chih-Tsun Huang and Jing-Jia Liou and Yao-Hua Chen and Juin-Ming Lu},
  year = {2017},
  doi = {10.1109/VLSI-DAT.2017.7939674},
  url = {https://doi.org/10.1109/VLSI-DAT.2017.7939674},
  researchr = {https://researchr.org/publication/HsuWHHLCL17},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3969-2},
}