A 3D Tiled Low Power Accelerator for Convolutional Neural Network - researchr publication authors

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Yuxiang Huan, Jiawei Xu, Lirong Zheng, Hannu Tenhunen, Zhuo Zou. A 3D Tiled Low Power Accelerator for Convolutional Neural Network. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]

This author has not been identified. Look up 'Yuxiang Huan' in GoogleThis author has not been identified. Look up 'Jiawei Xu' in GoogleThis author has not been identified. Look up 'Lirong Zheng' in GoogleThis author has not been identified. Look up 'Hannu Tenhunen' in GoogleThis author has not been identified. Look up 'Zhuo Zou' in Google

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