Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications]

Chao-Tsung Huang, Ching-Yeh Chen, Yi-Hau Chen, Liang-Gee Chen. Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications]. In 2005 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP '05, Philadelphia, Pennsylvania, USA, March 18-23, 2005. pages 93-96, IEEE, 2005. [doi]

Authors

Chao-Tsung Huang

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Ching-Yeh Chen

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Yi-Hau Chen

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Liang-Gee Chen

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