Zhiqiang Huang, Bingwei Jiang, Howard C. Luong. A 2.1-GHz Third-Order Cascaded PLL With Sub-Sampling DLL and Clock-Skew-Sampling Phase Detector. IEEE Trans. on Circuits and Systems, 65-I(7):2118-2126, 2018. [doi]
@article{HuangJL18-0,
title = {A 2.1-GHz Third-Order Cascaded PLL With Sub-Sampling DLL and Clock-Skew-Sampling Phase Detector},
author = {Zhiqiang Huang and Bingwei Jiang and Howard C. Luong},
year = {2018},
doi = {10.1109/TCSI.2017.2779514},
url = {https://doi.org/10.1109/TCSI.2017.2779514},
researchr = {https://researchr.org/publication/HuangJL18-0},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on Circuits and Systems},
volume = {65-I},
number = {7},
pages = {2118-2126},
}