A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers

Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez. A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers. Microprocessors and Microsystems, 39(8):869-878, 2015. [doi]

@article{HuangKRG15,
  title = {A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers},
  author = {Yanxiang Huang and Ajay Kapoor and Robert Rutten and José Pineda de Gyvez},
  year = {2015},
  doi = {10.1016/j.micpro.2014.11.003},
  url = {http://dx.doi.org/10.1016/j.micpro.2014.11.003},
  researchr = {https://researchr.org/publication/HuangKRG15},
  cites = {0},
  citedby = {0},
  journal = {Microprocessors and Microsystems},
  volume = {39},
  number = {8},
  pages = {869-878},
}