Kuo-Chan Huang, Chung-Len Lee, Jwu E. Chen. A Compiled-Code Parallel Pattern Logic Simulator With Inertial Delay Model. J. Inf. Sci. Eng., 15(6):885-897, 1999. [doi]
@article{HuangLC99,
title = {A Compiled-Code Parallel Pattern Logic Simulator With Inertial Delay Model},
author = {Kuo-Chan Huang and Chung-Len Lee and Jwu E. Chen},
year = {1999},
url = {http://www.iis.sinica.edu.tw/page/jise/1999/199911_07.html},
tags = {e-science, compiler, logic},
researchr = {https://researchr.org/publication/HuangLC99},
cites = {0},
citedby = {0},
journal = {J. Inf. Sci. Eng.},
volume = {15},
number = {6},
pages = {885-897},
}