The following publications are possibly variants of this publication:
- Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS TechnologyTzung-Je Lee, Tieh-Yen Chang, Chua-Chin Wang. tcas, 56-I(4):763-772, 2009. [doi]
- Mixed-voltage I/O buffer using 0.35 μm CMOS technologyTzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang. icecsys 2008: 850-853 [doi]
- A 1/2 times hbox VDD to 3 times hbox VDD Bidirectional I/O Buffer With a Dynamic Gate Bias GeneratorChua-Chin Wang, Chia-Hao Hsu, Yi-Cheng Liu. tcas, 57-I(7):1642-1653, 2010. [doi]