A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS

Ke Huang, Ziqiang Wang, Xuqiang Zheng, Xuan Ma, Kunzhi Yu, Chun Zhang, Zhihua Wang. A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 932-935, IEEE, 2012. [doi]

@inproceedings{HuangWZMYZW12,
  title = {A novel clock and data recovery scheme for 10Gbps source synchronous receiver in 65nm CMOS},
  author = {Ke Huang and Ziqiang Wang and Xuqiang Zheng and Xuan Ma and Kunzhi Yu and Chun Zhang and Zhihua Wang},
  year = {2012},
  doi = {10.1109/MWSCAS.2012.6292174},
  url = {https://doi.org/10.1109/MWSCAS.2012.6292174},
  researchr = {https://researchr.org/publication/HuangWZMYZW12},
  cites = {0},
  citedby = {0},
  pages = {932-935},
  booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2526-4},
}