Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC)

F. Hunsinger, Sebastien Francois, Ahmed Amine Jerraya. Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC). In Fourth International Workshop on Microprocessor Test and Verification, Common Challenges and Solutions (MTV 2003), May 29-30, 2003, Hyatt Town Lake Hotel, Austin, Texas, USA. pages 11, IEEE Computer Society, 2003. [doi]

Authors

F. Hunsinger

This author has not been identified. Look up 'F. Hunsinger' in Google

Sebastien Francois

This author has not been identified. Look up 'Sebastien Francois' in Google

Ahmed Amine Jerraya

This author has not been identified. Look up 'Ahmed Amine Jerraya' in Google