Design and implementation of a high-throughput fully parallel complex-valued QR factorisation chips

Yin-Tsung Hwang, Wei-Da Chen. Design and implementation of a high-throughput fully parallel complex-valued QR factorisation chips. IET Circuits, Devices & Systems, 5(5):424-432, 2011. [doi]

@article{HwangC11-1,
  title = {Design and implementation of a high-throughput fully parallel complex-valued QR factorisation chips},
  author = {Yin-Tsung Hwang and Wei-Da Chen},
  year = {2011},
  doi = {10.1049/iet-cds.2010.0143},
  url = {http://doi.ieeecomputersociety.org/10.1049/iet-cds.2010.0143},
  researchr = {https://researchr.org/publication/HwangC11-1},
  cites = {0},
  citedby = {0},
  journal = {IET Circuits, Devices & Systems},
  volume = {5},
  number = {5},
  pages = {424-432},
}