Two Cache Lines Prediction for a Wide-Issue Micro-architecture

Shu-Lin Hwang, Feipei Lai. Two Cache Lines Prediction for a Wide-Issue Micro-architecture. In 6th Australasian Computer Systems Architecture Conference (ACSAC 2001), 29-30 January 2001, Gold Coast, Queensland, Australia. pages 71-79, IEEE Computer Society, 2001. [doi]

@inproceedings{HwangL01:0,
  title = {Two Cache Lines Prediction for a Wide-Issue Micro-architecture},
  author = {Shu-Lin Hwang and Feipei Lai},
  year = {2001},
  doi = {10.1109/ACAC.2001.903361},
  url = {http://doi.ieeecomputersociety.org/10.1109/ACAC.2001.903361},
  tags = {caching, architecture},
  researchr = {https://researchr.org/publication/HwangL01%3A0},
  cites = {0},
  citedby = {0},
  pages = {71-79},
  booktitle = {6th Australasian Computer Systems Architecture Conference (ACSAC 2001), 29-30 January 2001, Gold Coast, Queensland, Australia},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-0954-1},
}