Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins

Ryoma Iimura, Satoshi Kitamura, Takayuki Kawahara. Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins. IEEE Trans. Circuits Syst. I Regul. Pap., 68(12):5061-5071, 2021. [doi]

@article{IimuraKK21,
  title = {Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins},
  author = {Ryoma Iimura and Satoshi Kitamura and Takayuki Kawahara},
  year = {2021},
  doi = {10.1109/TCSI.2021.3114422},
  url = {https://doi.org/10.1109/TCSI.2021.3114422},
  researchr = {https://researchr.org/publication/IimuraKK21},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Circuits Syst. I Regul. Pap.},
  volume = {68},
  number = {12},
  pages = {5061-5071},
}