Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs

Satoshi Imamura, Yuichiro Yasui, Koji Inoue, Takatsugu Ono, Hiroshi Sasaki, Katsuki Fujisawa. Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs. IEICE Transactions, 101-D(9):2247-2257, 2018. [doi]

@article{ImamuraYIOSF18,
  title = {Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs},
  author = {Satoshi Imamura and Yuichiro Yasui and Koji Inoue and Takatsugu Ono and Hiroshi Sasaki and Katsuki Fujisawa},
  year = {2018},
  url = {http://search.ieice.org/bin/summary.php?id=e101-d_9_2247},
  researchr = {https://researchr.org/publication/ImamuraYIOSF18},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {101-D},
  number = {9},
  pages = {2247-2257},
}