David Jeff Jackson, William A. Stapleton, Kenneth G. Ricks, David Minor. An FPGA-Based Area Efficient Tri-port Registerfile Design for RISC-Style Processor Implementations. In Bidyut Gupta, editor, 19th International Conference on Computers and Their Applications, CATA 2004, March 18-20, 2004, Red Lion Hotel on Fifth Avenue, Seattle, Washington, USA. pages 248-251, ISCA, 2004.
@inproceedings{JacksonSRM04,
title = {An FPGA-Based Area Efficient Tri-port Registerfile Design for RISC-Style Processor Implementations},
author = {David Jeff Jackson and William A. Stapleton and Kenneth G. Ricks and David Minor},
year = {2004},
tags = {design},
researchr = {https://researchr.org/publication/JacksonSRM04},
cites = {0},
citedby = {0},
pages = {248-251},
booktitle = {19th International Conference on Computers and Their Applications, CATA 2004, March 18-20, 2004, Red Lion Hotel on Fifth Avenue, Seattle, Washington, USA},
editor = {Bidyut Gupta},
publisher = {ISCA},
isbn = {1-880843-50-1},
}