Hardware Signature Generation Using a Hybrid PUF and FSM Model for an SoC Architecture

Kokila Jagadeesh, Arjun Murali Das, B. Shameedha Begum, Natarajan Ramasubramanian. Hardware Signature Generation Using a Hybrid PUF and FSM Model for an SoC Architecture. Period. Polytech. Electr. Eng. Comput. Sci., 63(4):244-253, 2019. [doi]

@article{JagadeeshDBR19,
  title = {Hardware Signature Generation Using a Hybrid PUF and FSM Model for an SoC Architecture},
  author = {Kokila Jagadeesh and Arjun Murali Das and B. Shameedha Begum and Natarajan Ramasubramanian},
  year = {2019},
  doi = {10.3311/ppee.13424},
  url = {https://doi.org/10.3311/ppee.13424},
  researchr = {https://researchr.org/publication/JagadeeshDBR19},
  cites = {0},
  citedby = {0},
  journal = {Period. Polytech. Electr. Eng. Comput. Sci.},
  volume = {63},
  number = {4},
  pages = {244-253},
}