FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture

Manish Kumar Jaiswal, Nitin Chandrachoodan. FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture. IEEE Transactions on Computers, 61(1):60-72, 2012. [doi]

@article{JaiswalC12-0,
  title = {FPGA-Based High-Performance and Scalable Block LU Decomposition Architecture},
  author = {Manish Kumar Jaiswal and Nitin Chandrachoodan},
  year = {2012},
  doi = {10.1109/TC.2011.24},
  url = {http://doi.ieeecomputersociety.org/10.1109/TC.2011.24},
  researchr = {https://researchr.org/publication/JaiswalC12-0},
  cites = {0},
  citedby = {0},
  journal = {IEEE Transactions on Computers},
  volume = {61},
  number = {1},
  pages = {60-72},
}