Architecture Generator for Type-3 Unum Posit Adder/Subtractor

Manish Kumar Jaiswal, Hayden Kwok-Hay So. Architecture Generator for Type-3 Unum Posit Adder/Subtractor. In IEEE International Symposium on Circuits and Systems, ISCAS 2018, 27-30 May 2018, Florence, Italy. pages 1-5, IEEE, 2018. [doi]

Authors

Manish Kumar Jaiswal

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Hayden Kwok-Hay So

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