Enhancing Instruction Prefetching via Cache and TLB Management - researchr publication authors

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Alexandre Valentin Jamet, Georgios Vavouliotis, Martí Torrents, Dimitrios Chasapis, Marc Casas. Enhancing Instruction Prefetching via Cache and TLB Management. In 53rd ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2026, Raleigh, NC, USA, June 27 - July 1, 2026. pages 2254-2269, IEEE, 2026. [doi]

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