2 SRAM cells, optimized for low power, high performance and high density SoC products

C.-H. Jan, F. Al-amoody, H. Y. Chang, T. Chang, Y.-W. Chen, N. Dias, W. Hafez, D. Ingerly, M. Jang, E. Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, C. Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, A. Subramaniam, C. Tsai, P. Vandervoorn, L. Yang, A. Zainuddin, P. Bai. 2 SRAM cells, optimized for low power, high performance and high density SoC products. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 12, IEEE, 2015. [doi]

Authors

C.-H. Jan

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F. Al-amoody

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H. Y. Chang

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T. Chang

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Y.-W. Chen

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N. Dias

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W. Hafez

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D. Ingerly

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M. Jang

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E. Karl

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S. K.-Y. Shi

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K. Komeyli

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H. Kilambi

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A. Kumar

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K. Byon

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C.-G. Lee

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J. Lee

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T. Leo

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P.-C. Liu

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N. Nidhi

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R. Olac-vaw

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C. Petersburg

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K. Phoa

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C. Prasad

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C. Quincy

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R. Ramaswamy

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T. Rana

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L. Rockford

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A. Subramaniam

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C. Tsai

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P. Vandervoorn

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L. Yang

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A. Zainuddin

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P. Bai

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