FPGA implementation of compact and low-power multiplierless architectures for DWT and IDWT - researchr publication authors

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Jhilam Jana, Ritesh Sur Chowdhury, Sayan Tripathi, Jaydeb Bhaumik. FPGA implementation of compact and low-power multiplierless architectures for DWT and IDWT. J. Real-Time Image Processing, 21(1):19, February 2024. [doi]

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