Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage

Aditya Japa, Manoj Kumar Majumder, Subhendu Kumar Sahoo, Ramesh Vaddi. Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage. IJHCITP, 48(4):524-538, 2020. [doi]

@article{JapaMSV20,
  title = {Tunnel FET-based ultralow-power and hardware-secure circuit design considering p-i-n forward leakage},
  author = {Aditya Japa and Manoj Kumar Majumder and Subhendu Kumar Sahoo and Ramesh Vaddi},
  year = {2020},
  doi = {10.1002/cta.2731},
  url = {https://doi.org/10.1002/cta.2731},
  researchr = {https://researchr.org/publication/JapaMSV20},
  cites = {0},
  citedby = {0},
  journal = {IJHCITP},
  volume = {48},
  number = {4},
  pages = {524-538},
}