Optimization of capacitive divider for 8-bit DAC realized in 65 nm CMOS process

Zbigniew Jaworski. Optimization of capacitive divider for 8-bit DAC realized in 65 nm CMOS process. In 22nd International Conference Mixed Design of Integrated Circuits & Systems, MIXDES 2015, Torun, Poland, June 25-27, 2015. pages 364-369, IEEE, 2015. [doi]

@inproceedings{Jaworski15a,
  title = {Optimization of capacitive divider for 8-bit DAC realized in 65 nm CMOS process},
  author = {Zbigniew Jaworski},
  year = {2015},
  doi = {10.1109/MIXDES.2015.7208544},
  url = {http://dx.doi.org/10.1109/MIXDES.2015.7208544},
  researchr = {https://researchr.org/publication/Jaworski15a},
  cites = {0},
  citedby = {0},
  pages = {364-369},
  booktitle = {22nd International Conference Mixed Design of Integrated Circuits & Systems, MIXDES 2015, Torun, Poland, June 25-27, 2015},
  publisher = {IEEE},
  isbn = {978-8-3635-7807-7},
}