Zbigniew Jaworski. Highly Linear 4-bit Flash ADC Implemented in 22 nm FD-SOI Process. In Andrzej Napieralksi, editor, 26th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2019, Rzeszów, Poland, June 27-29, 2019. pages 221-226, IEEE, 2019. [doi]
@inproceedings{Jaworski19-0,
title = {Highly Linear 4-bit Flash ADC Implemented in 22 nm FD-SOI Process},
author = {Zbigniew Jaworski},
year = {2019},
doi = {10.23919/MIXDES.2019.8787023},
url = {https://doi.org/10.23919/MIXDES.2019.8787023},
researchr = {https://researchr.org/publication/Jaworski19-0},
cites = {0},
citedby = {0},
pages = {221-226},
booktitle = {26th International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES 2019, Rzeszów, Poland, June 27-29, 2019},
editor = {Andrzej Napieralksi},
publisher = {IEEE},
isbn = {978-83-63578-16-9},
}