Microprocessor Instruction Design Tool for RISC-V Architecture

Luo Jiahui, Tomoyuki Morimoto, Tadahiro Ogita, Ryota Kawamata, Zi-ming Wang, Toshiyuki Tsutsumi. Microprocessor Instruction Design Tool for RISC-V Architecture. In 22nd International Symposium on Communications and Information Technologies, ISCIT 2023, Sydney, Australia, October 16-18, 2023. pages 1-6, IEEE, 2023. [doi]

@inproceedings{JiahuiMOKWT23,
  title = {Microprocessor Instruction Design Tool for RISC-V Architecture},
  author = {Luo Jiahui and Tomoyuki Morimoto and Tadahiro Ogita and Ryota Kawamata and Zi-ming Wang and Toshiyuki Tsutsumi},
  year = {2023},
  doi = {10.1109/ISCIT57293.2023.10376034},
  url = {https://doi.org/10.1109/ISCIT57293.2023.10376034},
  researchr = {https://researchr.org/publication/JiahuiMOKWT23},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {22nd International Symposium on Communications and Information Technologies, ISCIT 2023, Sydney, Australia, October 16-18, 2023},
  publisher = {IEEE},
  isbn = {978-1-6654-5731-6},
}