HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU

Yanhai Jiang, Bin Gao 0006, Jianshi Tang, Dabin Wu, Hu He 0001, He Qian, Huaqiang Wu. HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU. In 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021. pages 35-36, IEEE, 2021. [doi]

@inproceedings{Jiang0TW0QW21,
  title = {HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU},
  author = {Yanhai Jiang and Bin Gao 0006 and Jianshi Tang and Dabin Wu and Hu He 0001 and He Qian and Huaqiang Wu},
  year = {2021},
  doi = {10.1109/ICTA53157.2021.9661827},
  url = {https://doi.org/10.1109/ICTA53157.2021.9661827},
  researchr = {https://researchr.org/publication/Jiang0TW0QW21},
  cites = {0},
  citedby = {0},
  pages = {35-36},
  booktitle = {2021 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2021, Zhuhai, China, November 24-26, 2021},
  publisher = {IEEE},
  isbn = {978-1-6654-1747-1},
}