A predicate-aware modulo scheduling for improving resource efficiency of coarse grained reconfigurable architectures

Jhin-Bin Jiang, Kuen-Cheng Chiang, Jean Jyh-Jiun Shann. A predicate-aware modulo scheduling for improving resource efficiency of coarse grained reconfigurable architectures. In 7th IEEE International Symposium on Industrial Embedded Systems, SIES 2012, Karlsruhe, Germany, June 20-22, 2012. pages 311-314, IEEE, 2012. [doi]

@inproceedings{JiangCS12,
  title = {A predicate-aware modulo scheduling for improving resource efficiency of coarse grained reconfigurable architectures},
  author = {Jhin-Bin Jiang and Kuen-Cheng Chiang and Jean Jyh-Jiun Shann},
  year = {2012},
  doi = {10.1109/SIES.2012.6356604},
  url = {http://dx.doi.org/10.1109/SIES.2012.6356604},
  researchr = {https://researchr.org/publication/JiangCS12},
  cites = {0},
  citedby = {0},
  pages = {311-314},
  booktitle = {7th IEEE International Symposium on Industrial Embedded Systems, SIES 2012, Karlsruhe, Germany, June 20-22, 2012},
  publisher = {IEEE},
  isbn = {978-1-4673-2685-8},
}