Circuit-wise buffer insertion and gate sizing algorithm with scalability - researchr publication authors

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Zhanyuan Jiang, Weiping Shi. Circuit-wise buffer insertion and gate sizing algorithm with scalability. In Limor Fix, editor, Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008. pages 708-713, ACM, 2008. [doi]

This author has not been identified. Look up 'Zhanyuan Jiang' in GoogleThis author has not been identified. Look up 'Weiping Shi' in Google

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