Guiyuan Jiang, Jigang Wu, Jizhou Sun, Longting Zhu. Reducing the Interconnection Length for 3D Fault-Tolerant Processor Arrays. In Xian-He Sun, Wenyu Qu, Ivan Stojmenovic, Wanlei Zhou, Zhiyang Li, Hua Guo, Geyong Min, Tingting Yang, Yulei Wu, Lei Liu, editors, Algorithms and Architectures for Parallel Processing - 14th International Conference, ICA3PP 2014, Dalian, China, August 24-27, 2014. Proceedings, Part I. Volume 8630 of Lecture Notes in Computer Science, pages 497-510, Springer, 2014. [doi]
@inproceedings{JiangWSZ14,
title = {Reducing the Interconnection Length for 3D Fault-Tolerant Processor Arrays},
author = {Guiyuan Jiang and Jigang Wu and Jizhou Sun and Longting Zhu},
year = {2014},
doi = {10.1007/978-3-319-11197-1_38},
url = {http://dx.doi.org/10.1007/978-3-319-11197-1_38},
researchr = {https://researchr.org/publication/JiangWSZ14},
cites = {0},
citedby = {0},
pages = {497-510},
booktitle = {Algorithms and Architectures for Parallel Processing - 14th International Conference, ICA3PP 2014, Dalian, China, August 24-27, 2014. Proceedings, Part I},
editor = {Xian-He Sun and Wenyu Qu and Ivan Stojmenovic and Wanlei Zhou and Zhiyang Li and Hua Guo and Geyong Min and Tingting Yang and Yulei Wu and Lei Liu},
volume = {8630},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-319-11196-4},
}