Zhewei Jiang, Shihui Yin, Jae-sun Seo, Mingoo Seok. XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing Mechanism. In Houman Homayoun, Baris Taskin, Tinoosh Mohsenin, Weisheng Zhao, editors, Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019. pages 417-422, ACM, 2019. [doi]
@inproceedings{JiangYSS19,
title = {XNOR-SRAM: In-Bitcell Computing SRAM Macro based on Resistive Computing Mechanism},
author = {Zhewei Jiang and Shihui Yin and Jae-sun Seo and Mingoo Seok},
year = {2019},
doi = {10.1145/3299874.3319458},
url = {https://doi.org/10.1145/3299874.3319458},
researchr = {https://researchr.org/publication/JiangYSS19},
cites = {0},
citedby = {0},
pages = {417-422},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, GLSVLSI 2019, Tysons Corner, VA, USA, May 9-11, 2019},
editor = {Houman Homayoun and Baris Taskin and Tinoosh Mohsenin and Weisheng Zhao},
publisher = {ACM},
isbn = {978-1-4503-6252-8},
}