Computer aided partitioning for design of parallel testable VLSI systems

Deepa Jose, P. Nirmal Kumar, L. Saravakanthan, R. Dheeraj. Computer aided partitioning for design of parallel testable VLSI systems. In International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013. pages 1363-1366, IEEE, 2013. [doi]

@inproceedings{JoseKSD13,
  title = {Computer aided partitioning for design of parallel testable VLSI systems},
  author = {Deepa Jose and P. Nirmal Kumar and L. Saravakanthan and R. Dheeraj},
  year = {2013},
  doi = {10.1109/ICACCI.2013.6637376},
  url = {http://dx.doi.org/10.1109/ICACCI.2013.6637376},
  researchr = {https://researchr.org/publication/JoseKSD13},
  cites = {0},
  citedby = {0},
  pages = {1363-1366},
  booktitle = {International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013},
  publisher = {IEEE},
  isbn = {978-1-4799-2432-5},
}