Modeling and Optimization of Nano-Scale Sensing Shorted Gate FinFET D Flip-Flop Using AVL

Pooja Joshi, Saurabh Khandelwal, Shyam Akashe. Modeling and Optimization of Nano-Scale Sensing Shorted Gate FinFET D Flip-Flop Using AVL. J. Low Power Electronics, 11(3):298-307, 2015. [doi]

@article{JoshiKA15,
  title = {Modeling and Optimization of Nano-Scale Sensing Shorted Gate FinFET D Flip-Flop Using AVL},
  author = {Pooja Joshi and Saurabh Khandelwal and Shyam Akashe},
  year = {2015},
  doi = {10.1166/jolpe.2015.1401},
  url = {http://dx.doi.org/10.1166/jolpe.2015.1401},
  researchr = {https://researchr.org/publication/JoshiKA15},
  cites = {0},
  citedby = {0},
  journal = {J. Low Power Electronics},
  volume = {11},
  number = {3},
  pages = {298-307},
}