A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems - researchr publication authors

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Slavisa Jovanovic, Camel Tanougast, Serge Weber. A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems. In Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), August 5-8, 2007, University of Edinburgh, Scotland, United Kingdom. pages 358-364, IEEE Computer Society, 2007. [doi]

This author has not been identified. Look up 'Slavisa Jovanovic' in GoogleThis author has not been identified. Look up 'Camel Tanougast' in GoogleThis author has not been identified. Look up 'Serge Weber' in Google

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