Stimuli generator for testing processes in VHDL

Vacius Jusas, Tomas Neverdauskas. Stimuli generator for testing processes in VHDL. In 2014 NORCHIP, Tampere, Finland, October 27-28, 2014. pages 1-4, IEEE, 2014. [doi]

@inproceedings{JusasN14-0,
  title = {Stimuli generator for testing processes in VHDL},
  author = {Vacius Jusas and Tomas Neverdauskas},
  year = {2014},
  doi = {10.1109/NORCHIP.2014.7004744},
  url = {http://dx.doi.org/10.1109/NORCHIP.2014.7004744},
  researchr = {https://researchr.org/publication/JusasN14-0},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2014 NORCHIP, Tampere, Finland, October 27-28, 2014},
  publisher = {IEEE},
}