Design Space Exploration of Convolution Algorithms to Accelerate CNNs on FPGA

S. Kala, Debdeep Paul, Babita R. Jose, Nalesh Sivanandan. Design Space Exploration of Convolution Algorithms to Accelerate CNNs on FPGA. In Bijoy Antony Jose, Jimson Mathew, editors, 8th International Symposium on Embedded Computing and System Design, ISED 2018, Cochin, India, December 13-15, 2018. pages 21-25, IEEE, 2018. [doi]

Authors

S. Kala

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Debdeep Paul

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Babita R. Jose

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Nalesh Sivanandan

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