Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui. On Two-Pronged Power-Aware Voltage Scheduling for Multi-processor Real-Time Systems. In Nadine Azémard, Lars J. Svensson, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings. Volume 4644 of Lecture Notes in Computer Science, pages 423-432, Springer, 2007. [doi]
@inproceedings{KamiuraIM07,
title = {On Two-Pronged Power-Aware Voltage Scheduling for Multi-processor Real-Time Systems},
author = {Naotake Kamiura and Teijiro Isokawa and Nobuyuki Matsui},
year = {2007},
doi = {10.1007/978-3-540-74442-9_41},
url = {http://dx.doi.org/10.1007/978-3-540-74442-9_41},
tags = {context-aware},
researchr = {https://researchr.org/publication/KamiuraIM07},
cites = {0},
citedby = {0},
pages = {423-432},
booktitle = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings},
editor = {Nadine Azémard and Lars J. Svensson},
volume = {4644},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-540-74441-2},
}