An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA

Kenji Kanazawa, Tsutomu Maruyama. An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA. IEICE Transactions, 100-D(8):1807-1818, 2017. [doi]

Authors

Kenji Kanazawa

This author has not been identified. Look up 'Kenji Kanazawa' in Google

Tsutomu Maruyama

This author has not been identified. Look up 'Tsutomu Maruyama' in Google