A 50ns floating-point signal processor VLSI

Takao Kaneko, Hironori Yamauchi, Atsushi Iwata. A 50ns floating-point signal processor VLSI. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1986, Tokyo, Japan, April 7-11, 1986. pages 401-404, IEEE, 1986. [doi]

Authors

Takao Kaneko

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Hironori Yamauchi

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Atsushi Iwata

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