Temperature and Process Variations Aware Power Gating of Functional Units

Deepa Kannan, Aviral Shrivastava, Vipin Mohan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula. Temperature and Process Variations Aware Power Gating of Functional Units. In 21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India. pages 515-520, IEEE Computer Society, 2008. [doi]

@inproceedings{KannanSMBV08,
  title = {Temperature and Process Variations Aware Power Gating of Functional Units},
  author = {Deepa Kannan and Aviral Shrivastava and Vipin Mohan and Sarvesh Bhardwaj and Sarma B. K. Vrudhula},
  year = {2008},
  doi = {10.1109/VLSI.2008.83},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.83},
  tags = {context-aware},
  researchr = {https://researchr.org/publication/KannanSMBV08},
  cites = {0},
  citedby = {0},
  pages = {515-520},
  booktitle = {21st International Conference on VLSI Design (VLSI Design 2008), 4-8 January 2008, Hyderabad, India},
  publisher = {IEEE Computer Society},
}