Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten. Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. Microprocessors and Microsystems, 61:58-71, 2018. [doi]
@article{KatevenisABCFCL18,
title = {Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development},
author = {Manolis Katevenis and Roberto Ammendola and Andrea Biagioni and Paolo Cretaro and Ottorino Frezza and Francesca Lo Cicero and Alessandro Lonardo and Michele Martinelli and Pier Stanislao Paolucci and Elena Pastorelli and Francesco Simula and Piero Vicini and Giuliano Taffoni and Jose Antonio Pascual and Javier Navaridas and Mikel Luján and John Goodacre and Bernd Lietzow and Martin L. Kersten},
year = {2018},
doi = {10.1016/j.micpro.2018.05.009},
url = {https://doi.org/10.1016/j.micpro.2018.05.009},
researchr = {https://researchr.org/publication/KatevenisABCFCL18},
cites = {0},
citedby = {0},
journal = {Microprocessors and Microsystems},
volume = {61},
pages = {58-71},
}