A Low-Speed BIST Framework for High-Performance Circuit Testing - researchr publication authors

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Hans G. Kerkhoff, Mansour Shashaani, Manoj Sachdev. A Low-Speed BIST Framework for High-Performance Circuit Testing. In 18th IEEE VLSI Test Symposium (VTS 2000), 30 April - 4 May 2000, Montreal, Canada. pages 349-358, IEEE Computer Society, 2000. [doi]

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