Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT

Victor Khomenko, Maciej Koutny, Alexandre Yakovlev. Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT. Fundamenta Informaticae, 70(1-2):49-73, 2006. [doi]

@article{KhomenkoKY06,
  title = {Logic Synthesis for Asynchronous Circuits Based on STG Unfoldings and Incremental SAT},
  author = {Victor Khomenko and Maciej Koutny and Alexandre Yakovlev},
  year = {2006},
  url = {http://iospress.metapress.com/openurl.asp?genre=article&issn=0169-2968&volume=70&issue=1&spage=49},
  tags = {rule-based, logic, incremental},
  researchr = {https://researchr.org/publication/KhomenkoKY06},
  cites = {0},
  citedby = {0},
  journal = {Fundamenta Informaticae},
  volume = {70},
  number = {1-2},
  pages = {49-73},
}