A 2MHz BW Buffer-Embedded Noise-Shaping SAR ADC Achieving 73.8dB SNDR and 87.3dB SFDR

Taewoong Kim, Youngcheol Chae. A 2MHz BW Buffer-Embedded Noise-Shaping SAR ADC Achieving 73.8dB SNDR and 87.3dB SFDR. In IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019. pages 1-4, IEEE, 2019. [doi]

@inproceedings{KimC19-18,
  title = {A 2MHz BW Buffer-Embedded Noise-Shaping SAR ADC Achieving 73.8dB SNDR and 87.3dB SFDR},
  author = {Taewoong Kim and Youngcheol Chae},
  year = {2019},
  doi = {10.1109/CICC.2019.8780230},
  url = {https://doi.org/10.1109/CICC.2019.8780230},
  researchr = {https://researchr.org/publication/KimC19-18},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2019, Austin, TX, USA, April 14-17, 2019},
  publisher = {IEEE},
  isbn = {978-1-5386-9395-7},
}