An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors

Cheol Hong Kim, Sung Woo Chung, Chu Shik Jhon. An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors. IEICE Transactions, 89-D(4):1450-1458, 2006. [doi]

@article{KimCJ06:0,
  title = {An Energy-Efficient Partitioned Instruction Cache Architecture for Embedded Processors},
  author = {Cheol Hong Kim and Sung Woo Chung and Chu Shik Jhon},
  year = {2006},
  doi = {10.1093/ietisy/e89-d.4.1450},
  url = {http://dx.doi.org/10.1093/ietisy/e89-d.4.1450},
  tags = {caching, architecture, partitioning},
  researchr = {https://researchr.org/publication/KimCJ06%3A0},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {89-D},
  number = {4},
  pages = {1450-1458},
}