A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs

Si-Nai Kim, Woo-Cheol Kim, Min-Jae Seo, Seung-Tak Ryu. A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs. IEEE Trans. on Circuits and Systems, 65-II(9):1154-1158, 2018. [doi]

@article{KimKSR18,
  title = {A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs},
  author = {Si-Nai Kim and Woo-Cheol Kim and Min-Jae Seo and Seung-Tak Ryu},
  year = {2018},
  doi = {10.1109/TCSII.2018.2809965},
  url = {https://doi.org/10.1109/TCSII.2018.2809965},
  researchr = {https://researchr.org/publication/KimKSR18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {65-II},
  number = {9},
  pages = {1154-1158},
}