Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method

Tomoya Kitai, Yusuke Oguro, Tomohiro Yoneda, Eric Mercer, Chris J. Myers. Level Oriented Formal Model for Asynchronous Circuit Verification and its Efficient Analysis Method. In 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 16-18 December 2002, Tsukuba-City, Ibarski, Japan. pages 210-220, IEEE Computer Society, 2002. [doi]

Authors

Tomoya Kitai

This author has not been identified. Look up 'Tomoya Kitai' in Google

Yusuke Oguro

This author has not been identified. Look up 'Yusuke Oguro' in Google

Tomohiro Yoneda

This author has not been identified. Look up 'Tomohiro Yoneda' in Google

Eric Mercer

This author has not been identified. Look up 'Eric Mercer' in Google

Chris J. Myers

This author has not been identified. Look up 'Chris J. Myers' in Google