Yuya Kitazawa, Kazuhito Ito. Register Minimization and its Application in Schedule Exploration for Area Minimization for Double Modular Redundancy LSI Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 105-A(3):530-539, 2022. [doi]
@article{KitazawaI22, title = {Register Minimization and its Application in Schedule Exploration for Area Minimization for Double Modular Redundancy LSI Design}, author = {Yuya Kitazawa and Kazuhito Ito}, year = {2022}, doi = {10.1587/transfun.2021vlp0015}, url = {https://doi.org/10.1587/transfun.2021vlp0015}, researchr = {https://researchr.org/publication/KitazawaI22}, cites = {0}, citedby = {0}, journal = {IEICE Trans. Fundam. Electron. Commun. Comput. Sci.}, volume = {105-A}, number = {3}, pages = {530-539}, }